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Verification Workflow

From GDS to verified report in three steps.

Photoniq slots between your layout sign-off and tape-out submission. Import your existing GDS and netlist, run the verification engines, and get a structured report before the mask order goes in.

GDS + Netlist + PDK Spec Inputs Photoniq Engine LVS · Mode Check Optical Loss 5–30 min Verification Report JSON + HTML

What happens in each step

01
Import

Import your GDS layout + schematic netlist

Submit your GDS-II or OASIS layout file alongside your SPICE netlist (or Virtuoso CDF export). Specify your PDK — Photoniq loads the corresponding rule deck and layer map automatically.

No GDS flattening required. Photoniq works on hierarchical designs and respects cell boundaries in its output.

GDS-II / OASIS SPICE Netlist Virtuoso CDF PDK Identifier
photoniq-cli import
$ photoniq import \
    --gds ./layout/pic_top_v3.gds \
    --netlist ./sim/pic_top.spi \
    --pdk AIM_300mm_v3.1

 GDS parsed: 847 cells, 12 top-level ports
 Netlist loaded: 14 nets, 8 devices
 PDK rule deck: 248 DRC rules, 6 optical checks
Job created: PNQ-2A8F — queued
02
Verify

LVS engine + optical loss engine run in parallel

Two engines run concurrently on your design. The LVS engine extracts connectivity from GDS layers and cross-references it against your schematic netlist. Ports, routing, and component placement are all checked.

The optical loss engine traverses your waveguide network computing propagation loss, mode field overlaps at junctions, and coupling efficiency at every coupler, splitter, and grating element. Loss budget is accumulated from input port to all output ports.

Typical runtime: 5–30 minutes depending on circuit element count and PDK complexity.

LVS Engine Mode Check Optical Loss DRC Pass
verification progress
Job PNQ-2A8F — running
─────────────────────────────────
[LVS]  Extracting netlist from GDS...
  Connectivity map: 14 nets extracted
  LVS compare: 14/14 nets matched
[LVS complete: 3m 12s]

[OPT] Traversing waveguide network...
  836 waveguide segments analysed
  Mode mismatch at wg_taper (cell 4)
  Coupling gap deviation: coupler_N
[OPT complete: 7m 44s]
Report generating...
03
Report

Structured verification report for fab review

JSON and HTML reports are delivered to your job dashboard. Every violation includes: error type, cell hierarchy path, GDS layer and coordinate, severity level, and a plain-language suggested fix.

The HTML report is designed for team review sessions. The JSON report integrates into CI/CD pipelines and can be parsed to block a tape-out submission when blocking errors are present.

JSON Report HTML Report CSV Export Fab Submission Ready
report delivered
Job PNQ-2A8F — complete (10m 56s)
─────────────────────────────────
STATUS: FAIL
  1 blocking error (must resolve before tape-out)
  2 warnings (review recommended)
  4 checks passed
─────────────────────────────────
Reports available:
  report.json   machine-readable
  report.html   team review
  report.csv    fab submission

Error types Photoniq catches

Every error type corresponds to a class of failure that causes PIC re-spins in real silicon photonics tape-out flows.

Error Type Description Severity
MODE_MISMATCH Width discontinuity at waveguide junction results in TE0 field overlap below PDK threshold. Causes insertion loss and multimode excitation. ERROR
COUPLING_INEFFICIENCY Coupling gap deviation from PDK nominal causes excess insertion loss. Includes edge coupler, grating coupler, and directional coupler checks. WARNING
WAVEGUIDE_WIDTH_VIOLATION Routing segment width outside PDK single-mode window. Below minimum: evanescent leakage. Above maximum: multimode propagation. ERROR
TAPER_ANGLE_ERROR Taper half-angle exceeds the adiabatic limit for the specified waveguide geometry and wavelength. Mode conversion efficiency reduced. WARNING
ROUTING_SCHEMATIC_MISMATCH GDS layout connectivity does not match extracted SPICE netlist. Missing port connections or incorrect routing topology. ERROR
UNCONNECTED_PORT Input or output port defined in schematic has no corresponding waveguide termination in the GDS layout. ERROR
MISSING_TERMINATION Waveguide end without a defined absorber, scatterer, or port termination. Generates parasitic reflections. WARNING
GAP_SPACING_VIOLATION Coupling gap between parallel waveguides outside PDK tolerance range. Affects directional coupler split ratio and ring resonator resonance. WARNING
OPTICAL_LOSS_BUDGET Cumulative optical loss from input to output exceeds the design-specified budget. Loss budget is computed for each path. WARNING

Ready to run your first verification?

See the Quickstart guide to import a GDS and run your first Photoniq verification job.

Read the Quickstart Request Access